In the early years of the PC, FPM (Fast Page Mode) DRAM was usually the most common form of DRAM available for personal computers. The Page Mode process allowed for the accessing of information by providing a constant RAS (Row Address Strobe) signal while at the same time, allowing the CAS (Column Address Strobe) signal to maneuver to different locations. This process acquires data from columns sharing the same row, but without the need to constantly specify the row location in each access. By acquiring rows of information, or pages, in this manner, the operation resulted in a lower memory access time and a reduction in power consumption, an overall improvement over its predecessors.
EDO (Extended Data Out) devices proved to have a slight advantage over the FPM memories. Typical FPM devices would turn off their data output buffer at the rising edge of the CAS signal, so reading information would no longer be possible (Refer to DRAM Data Array diagram). EDO devices allow the read process to extend past the point of CAS going high. This process allowed for a slightly (~25%) more efficient memory device.
The drawing shows a simplified block diagram of a Legacy DRAM device. Vdd is 5V or 3.3V. The following drawing illustrate the read timing diagram.